DM74ALS165 register equivalent, 8-bit parallel in/serial out shift register.
a clock inhibit function and a complemented serial output, QH. Clocking is accomplished by a LOW-to-HIGH transition of the CLK input while SH/LD is held HIGH and CLK INH .
The DM74ALS165 is an 8-bit serial register that, when clocked, shifts the data toward serial output, QH. Parallel-in access to each stage is provided by eight individual direct data inputs that are enabled by a low level at the SH/LD input. The DM74A.
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